Abstract

Maintaining the microelectronics industry's aggressive pace of density scaling beyond the resolution limits of optical lithography is forcing the introduction of double-patterning technology (DPT) that effectively doubles the pattern density achievable with 193nm optical lithography. This paper investigates the degree to which DPT affects design tools, layout methodologies, and data standards. Design solutions are demonstrated and the efficiency of various double-patterning aware design methodologies is compared based on the first metal level of a 20nm-node standard cell design flow. Necessary design-tool and data-standard requirements for a DPT-aware standard cell design flows are enumerated and summarized.

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