Abstract
Data computation and storage are essential parts of developing big data applications. The memristor device technology could remove the speed and energy efficiency bottleneck in the existing data processing. The present experimental work investigates the decision support system in a new architecture, computation-in-memory (CIM) architecture, which can be utilized to store and process big data in the same physical location at a faster rate. The decision support system is used for data computation and storage, with the aims of helping memory units read, write, and erase data and supporting their decisions under big data communication ambiguities. Data communication is realized within the crossbar by the support of peripheral controller blocks. The feasibility of the CIM architecture, adaptive read, write, and erase methods, and memory accuracy were investigated. The integrated circuit emphasis (SPICE) simulation results show that the proposed CIM architecture has the potential of improving the computing efficiency, energy consumption, and performance area by at least two orders of magnitude. CIM architecture may be used to mitigate big data processing limits caused by the conventional computer architecture and complementary metal-oxide-semiconductor (CMOS) transistor process technologies.
Highlights
Digital datasets have been rapidly growing in size and complexity, ranging from economics and business activities to public administration and from national security to many scientific research areas
Big data applications require computing resources and storage systems that can scale to manage a massive amount of diverse data, and improvements in the energy consumption and throughput of digital processors are reaching a plateau as complementary metal-oxidesemiconductor (CMOS) technology approaches the end of process scaling
Memristor is not a physical device, so it did not receive public attention until 2008, when Williams and his research group in the HP laboratory unveiled a twoterminal TiO2 nanoscale device that exhibited memristive hysteresis characteristics [4], generating a strong interest in the memristor [5,6,7]. Williams and his coworkers showed that memristors could realize nanoscale crossbar memory and replace the existing computer memory systems in the future while taking up a much smaller area [8]
Summary
Digital datasets have been rapidly growing in size and complexity, ranging from economics and business activities to public administration and from national security to many scientific research areas. Is paper attempts to obtain a CIM architecture with fewer controllable wires and higher memory capacity as compared to the existing crossbar array architecture. To avoid the destructive signal issue in write operations, we propose to improve the memristor-based memory cell structure.
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