Abstract
RISC-V processors are an open source ISA (Instruction Set Architecture), which means that anyone can design and modify them to meet the specific objectives of any development. Thanks to the flexibility it brings with it, it is possible to add a debugging and programming logic unit to this processor to get a real sense of how the processor works, a unit that will be key to identifying errors during the design of the processor, as well as errors that may occur during the manufacturing process. This article presents the methodology used to incorporate hardware that allows the processor to be debugged, using the IEEE 1149.1 standard as a reference
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