DC–13.4 GHz frequency divider with −20 dBm input power sensitivity in 0.18 [micro sign]m CMOS

Abstract

To operate a frequency divider with small input clock power, the self-oscillating frequency of the divider is tuned according to the input clock frequency. The proposed frequency divider is implemented in a 0.18 µm CMOS technology and can operate from DC to 13.4 GHz with input clock power less than −20 dBm while consuming 7.2–10.8 mW from a 1.8V supply.