應用於 14-63-GHz 頻率合成器的CMOS除頻器之設計與實現

Abstract

In high frequency communication system, radio frequency transceiver front-end is a very important part. A frequency synthesizer that provides local oscillated signal is a critical building block in the transceiver front-end. The frequency dividers studied in this thesis are often applied to the frequency synthesizer. Recently, the operating frequency becomes more and more high in wireless communication systems, hence the frequency divider must be designed in high frequency. In this thesis, three architectures of frequency divider used for different frequency band are designed and implemented. First, we introduce two direct injection-locked frequency dividers (ILFDs) using 0.13 μm CMOS technology. The microstrip lines were used as inductors to design the circuits. We use the PMOS-only-switch and complimentary cross-coupled pair to implement the first direct ILFD. The maximum operating frequency of the first direct ILFD is 63.1 GHz and the locking range is 1.86 GHz. To further increase the locking range, we use the NMOS-only-switch and the power-matching technique for the second designed direct ILFD. Thus, the locking range increases to 6.2 GHz, i.e.52 GHz to 58.2 GHz. After varactor tuning, the operating frequency range further increase to 9.3 GHz. Next, we introduce two injection-locked frequency dividers using shunt-peaking technique. The shunt-peaking technique applied to the ILFD can increase the locking range. The first ILFD using 0.18 μm CMOS technology has the maximum operating frequency of 38.4 GHz and the locking range of 1.8 GHz. Moreover, the second ILFD using 0.13 μm CMOS technology has the wider locking range of 6.1 GHz, i.e.48.7 GHz to 55.8 GHz and the power consumption is only 2 mW. Finally, we introduce a current-mode logic (CML) frequency divider using inductive-peaking technique. The CML frequency divider is fabricated in 0.18 μm CMOS technology. The inductive-peaking technique applied to the CML frequency divider can enhance the maximum locking range. Thus, the operating frequency of the CML frequency divider is enhanced to 20.1 GHz and a wider locking range of 6.3 GHz is achieved.