D-Band Frequency Quadruplers in BiCMOS Technology

Abstract

This paper presents two D-band frequency quadruplers (FQs) employing different circuit techniques. First FQ is a 129–171-GHz stacked Gilbert-cell multiplier using a bootstrapping technique, which improves the bandwidth and the conversion gain with respect to the conventional topology. Stacked architecture enables current reuse for the second frequency doubler resulting in a compact and energy-efficient design. The circuit reaches 3-dB bandwidth of 42 GHz, which is the highest among similar reported quadruplers. It achieves 2.2-dBm saturated output power, 5-dB peak conversion gain, and 1.7% peak DC-to-RF efficiency. The stacked FQ occupies 0.08 mm2 and consumes 22.7 mA from 4.4-V supply. Second presented circuit is a transformer-based injection-locked FQ (T-ILFQ) employing an E-band push–push voltage-controlled oscillator (PP-VCO). The VCO is a self-buffered common-collector Colpitts oscillator with a transformer formed on emitter inductors. Proposed configuration does not reduce the tuning range of the VCO, thus providing wide locking range and high sensitivity with respect to the injected signal. The T-ILFQ achieves 21.1% locking range, which is the highest among other reported injection-locked frequency multipliers. The peak output power is −4 dBm and the input sensitivity reaches −22 dBm. The circuit occupies 0.09 mm2 and consumes 14.8 mA from 3.3-V supply.