Data Encoding for Low-Power in Wormhole-Switched Networks-on-Chip

Abstract

As the number of cores in a chip increases, the role played by the communication system becomes more and more central. An on-chip communication infrastructure based on the Network-on-Chip (NoC) paradigm is today recognized as the most effective and scalable solution able to deal with the communication issues that will characterize the next generation of many-cores architectures. An ever more significant fraction of the overall chip area is devoted to support advanced and reliable communication protocols making the energy resources used for communication starting to compete with the ones spent for computation. Amongst the communication resources, as technology shrinks, the power ratio between NoC links and routers increases making the links becoming more power- hungry than routers. In this paper we propose a novel end- to-end data encoding scheme which exploits the wormhole technique commonly used in NoC-based system to reduce power dissipated by the NoC links. We assess the proposed encoding scheme on a set of representative data streams showing that it is possible to reduce the power contribution of both the self switching activity and the coupling switching activity in inter-routers links. As results, we obtain a reduction in total power dissipation and energy consumption up to 26% and 9% respectively without any significant degradation in terms of both performance and silicon area. The encoder and decoder logic is integrated in the network interface and is transparent to the underling NoC. Keywords-Network on Chip; Low power; Data encoding; Coupling capacitance; Power analysis.