DART: Distributed Particle Filter Algorithm with Resampling Tree for Ultimate Real-Time Capability

Abstract

A novel Distributed Particle Filter Algorithm with Resampling Tree, called DART, is proposed in this paper, where particles are resampled by Branch Resampling and Root Resampling in a flexible tree-like structure. Though sampling and weight calculation can be executed in parallel on a group of Processing Elements, resampling is the bottleneck for distributed particle filters since it requires the knowledge of the whole particle set. Conventional approaches to accelerate resampling on distributed platforms often introduce extra procedure other than the standard processing flow and achieve acceleration limited by linear speedup. By introducing the proposed algorithm, where Branch Resampling can be executed in parallel with sampling and weight calculation, the number of particles in the final sequential implemented Root Resampling can be reduced in an exponential relationship with the depth of the tree. With the same linear speedup in sampling and weight calculation steps, the overall speedup achieved in DART surpasses linear boundary and outperforms state-of-art approaches. The corresponding implementation architecture, which possesses unique features of hardware efficiency and scalability, is also presented. The prototype of the algorithm with 8 PEs is implemented on a Xilinx Virtex-IV Pro FPGA (XC4VFX100-12FF1152) under BOT system. With 8192 particles, the input observation can achieve 63.3 kHz at a clock speed of 80 MHz.