Abstract

<bold xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">Dark silicon, the</b> topic of this month’s <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">IEEE Design&amp;Test (D&amp;T)</i> may or may not be here already, but it is coming. Anyone involved with microprocessor design knows that trying to run all the transistors at once is a recipe for a baked IC. We in testing have had to be careful with patterns used for scan, since while increasing the variability of don’t care bits might help with coverage, it will hurt power consumption.

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