Abstract

In this paper, a novel technique suppressing cavity- mode resonances in PCB power-bus structures by using lossy slot resonators is presented. Guidelines for an optimized damping of the modal resonances are specified, which are based on rules derived recently for an appropriate selection and placement of damping capacitors. The effectiveness of the presented damping technique is shown by simulations as well as measurements considering several PCBs of different shape. I. INTRODUCTION Printed circuit boards (PCBs) for high-speed digital circuits use power and ground plane structures for power distribution. At higher frequencies this power-bus behaves as a cavity resonator (1)-(3). Resonances of the power-bus not only cause radiated emissions as EM interference, but also give rise to simultaneous switching noise as a signal integrity problem in high speed digital circuits. Therefore, a low impedance behavior of the power-bus is of great interest for engineers engaged in high-speed PCB design. Recently it has been shown, that discrete capacitors can be used successfully for damping of cavity-mode resonances in PCBs. Further, rules for an optimized selection and placement of these damping capacitors have been derived (4)-(6). In this work, we present a novel technique suppressing these modal resonances by using lossy slot resonators. Guide- lines for an optimized damping of the modal resonances are specified, which are based on the rules derived for damping capacitors. The effectiveness of this novel damping technique is exemplified by simulations as well as measurements con- sidering several PCBs of different shape.

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