Abstract

Ternary content-addressable memory (TCAM) is a high-speed searching device that searches the entire memory in parallel in deterministic time, unlike random-access memory (RAM), which searches sequentially. A network router classifies and forwards a data packet with the aid of a TCAM that stores the routing data in a table. Field-programmable gate arrays (FPGAs), due to its hardware-like performance and software-like reconfigurability, are widely used in networking systems where TCAM is an essential component. TCAM is not included in modern FPGAs, which leads to the emulation of TCAM using available resources on FPGA. Several emulated TCAM designs are presented but they lack the efficient utilization of FPGA's hardware resources. In this paper, we present a novel TCAM architecture, the distributed RAM based TCAM (D-TCAM), using D-CAM as a building block. One D-CAM block implements a 48-bytes TCAM using 64 lookup tables (LUTs), that is cascaded horizontally and vertically to increase the width and depth of TCAM, respectively. A sample size of 512 x 144 is implemented on Xilinx Virtex-6 FPGA, which reduced the hardware utilization by 60% compared to the state-of-the-art FPGA-based TCAMs. Similarly, by exploiting the LUT-flip-flip (LUT-FF) pair nature of Xilinx FPGAs, the proposed TCAM architecture improves throughput by 58.8% without any additional hardware cost.

Highlights

  • Content-addressable memory (CAM) is a special type of associative array that performs parallel searching of the stored rules

  • We propose a novel Field-programmable gate arrays (FPGAs)-based ternary CAM (TCAM) architecture which efficiently utilizes the available hardware resources on FPGA and improves throughput compared to the state-of-the-art FPGA-based TCAMs [11], [15]

  • We propose a novel TCAM architecture using distributed-random-access memory (RAM) (D-TCAM) which outperforms the state-of-the-art FPGA-based TCAMs by efficiently utilizing the hardware resources

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Summary

INTRODUCTION

Content-addressable memory (CAM) is a special type of associative array that performs parallel searching of the stored rules. TCAM is vital element in networking applications, modern FPGAs lack a hard core for TCAM because of its many other applications where TCAM would not be used Several emulated TCAMs are proposed using the memory resources inside FPGAs, which are known as FPGA-based CAMs. In this paper, we propose a novel FPGA-based TCAM architecture which efficiently utilizes the available hardware resources on FPGA and improves throughput compared to the state-of-the-art FPGA-based TCAMs [11], [15]. MOTIVATIONS TCAM is an essential element in modern networking applications where it provides the functionality of packet classification and packet forwarding in the form of implementing a routing table.

KEY CONTRIBUTIONS Key contributions of the proposed work are as follows:
SEACHING OPERATION
Findings
CONCLUSIONS AND FUTURE WORK
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