Abstract
We present a feature detection method for selective grid refinement in hierarchical grids used in process technology computer-aided design topography simulations based on the curvature of the wafer surface. The proposed method enables high-accuracy simulations whilst significantly reducing the run-time, as the grid is only refined in regions with high curvatures. We evaluate our method by simulating selective epitaxial growth of silicon-germanium fins in narrow oxide trenches. The performance and accuracy of the simulation is assessed by comparing the results to experimental data showing good agreement.
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