Abstract

In the history of electronics, solid-state materials replaced the vacuum parts to reduce power consumption and to obtain better reliability at a reduced cost. The size of solid-state transistors continued to reduce since its introduction, and currently, we have transistors with dimensions on the order of ~10 nm. This downscaling of transistor dimension accompanied with proportionate changes in supply voltage so that the overall power consumption stays below a tolerable limit. The situation dramatically changed when requirements of proper electrostatic control over the entire length of the transistor and its reliable operation stopped supply voltage scaling, increased OFF-state leakage, and hence caused exponential increase in power consumption. The introduction of a high-κ gate dielectric and then a multiple/ surround gate within the CMOS architecture have improved the situation, but still have not provided the complete solution for the future. For future electronic devices, we need switches with extremely low OFF-state leakage, small supply voltage, and high-drive current without compromising the yield and reliability currently available in modern-day nanoscale transistors. The available options are based on extensions of current CMOS transistors by using nanowires, III-V compounds, carbon nanomaterials, transition metal dichalcogenides as channel, ferroelectrics as dielectric, and ferromagnets as source/drain. On the other hand, device architectures that are completely different from conventional CMOS (so-called beyond CMOS devices) such as tunnel transistors, nanoelectromechanical devices, and impact ionization transistors are also under consideration for future electronics. The performance of many of these beyond CMOS devices is yet to be comparable to that obtained in the current-day CMOS transistors. In addition, many of these proposed devices have a number of classical and some novel reliability concerns. This review article presents reliability concerns for a set of extended and beyond CMOS devices and shows that defects in different parts of these devices require detailed study to ensure their usability in electronics industry. Therefore, in addition to the current ongoing research to obtain better performance using the proposed devices, a parallel reliability analysis is also needed. This kind of early-stage reliability analysis may reveal whether any reliability concern is intrinsically related to the device design-hence suggests us to look for alternative device concepts for future CMOS.

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