Abstract
Double gate silicene field effect transistor is investigated using Density Functional Theory (DFT) and Non-Equilibrium Green's Function (NEGF) formalism. The results suggest that with an increase in gate bias, bandgap is introduced in silicene which results in reduction in device current. The increase in silicene bandgap is also related to the reduction in channel length. It is observed that drain to source current (IDS) saturates on increasing drain to source voltage (VDS). On increasing VDS beyond saturation region, at some value of VDS kink effect is seen which is due to switching in the type of carriers at the drain end due to ambipolar channel. Transconductance (gm) is seen to reduce with reduction in channel length, however, gm improves with reduced oxide thickness due to better gate controllability. The output characteristics do not change much with oxide thickness.
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