Current Ripple Reduction Using AC Core Biasing in DC–DC Converters

Abstract

Inductor design in dc–dc converters needs to be carried out considering the current ripple, converter volume, and saturation current limit. This article presents an inductor core-biasing technique (ICBT) to minimize the current ripple without increasing the inductance value. In contrast to prior works, an ac bias is used, and the ripple reduction under the proposed ICBT is demonstrated through simulations in MATLAB/Simulink under linear and saturation conditions. Experimental results are further provided to validate the simulation results for different inductance values. It is demonstrated that the proposed ICBT can significantly lower the inductance value required for achieving the same ripple current while offering the enhanced saturation capability and improved efficiency for the same core size.