Abstract
This article introduces a current-mode field-programmable analog array (FPAA) architecture with its programming methods. The biggest benefit of the proposed approach is solving the problem of implementing reconfigurable analog circuits in modern nanometre technologies. It is achieved thanks to adopting a switched-current (SI) technique which allows to implement the array using transistors based only on the standard digital CMOS technology. The work describes an implementation of a reconfigurable current mirror basing on using a digital-to-analog converter. The article addresses a routing problem of current-mode modules working in a balanced mode. Author proposes methods for CMRR compensation in a huge array architecture. The array was programmed taking into consideration parasitic elements of the layout with the emphasis on topography mismatch. Examples of implementing a 10-bit digital–analog converter, an elliptic filter with SNR,=,40.42 dB, 2D-DCT processor with PSNR,=,53.05 dB and RGB-to-YCrCb converter with PSNR,=,46.95 dB are presented. The elaborated array can be used as IPcore in a larger mixed-signal system or can act as a dedicated circuit.
Highlights
The development of reconfigurable analog circuits, especially field-programmable analog arrays (FPAA) is nowadays the most current challenge in the VLSI1 branch of science which follows the trends of miniaturisation and automation [11,14,16,26, 47]
Another benefit of such an approach is that transistors parameters in digital-to-analog converters (DAC) or in the whole reconfigurable current mirror (RCM) module do not have to be calculated with high precision, which means that restriction in Eq 9 is not crucial
The author, using C++, developed computer tools for the design process, integrated with the presented architecture, which automate the process of generating a grid of solutions and configure an FPAA memory based on a description of a synthesised analogue circuit architecture, with its description in VHDL-AMS
Summary
The development of reconfigurable analog circuits, especially field-programmable analog arrays (FPAA) is nowadays the most current challenge in the VLSI1 branch of science which follows the trends of miniaturisation and automation [11,14,16,26, 47]. The continuous time mode prevents implementing advanced structures Another FPAA proposition bases on a digitally controlled balanced output transconductor [25]. It does not fully work in the current mode, and its implementation requires implementing a gain amplifier. Implementing filters using such structures requires using capacitors; FPAA contains an array of keyed capacitances. Taking into account the above implementations and their limitations, the author decided to propose a fully analogue solution, with a digital interface, which can be implemented using the standard digital CMOS technology and providing the possibility of implementing advanced structures with high data processing accuracy.
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