A Reconfigurable Analog Processor Based on FPAA with Coarse-Grained, Heterogeneous Configurable Analog Blocks

Abstract

A Reconfigurable Analog Processor (RAP), based on the Field-Programmable Analog Array (FPAA) architecture, is designed for mixed-signal processing. The use of coarse-grained, Heterogeneous Configurable Analog Blocks (Hetero-CABs) in the FPAA architecture breaks through the former FPAA design limitations. Both low power design and flexibility are achieved. Mixed-signal processing can be performed by the assistance of an on-chip MCU and Configurable Digital Block (CDB). Relative precision of the analog processing is 99.5%, guaranteed by the minimized use of switches in the FPAA architecture, low-offset design and offset/noise cancelling technique. A PID controller is taken as an application example. RAP is manufactured in SMIC standard 0.18μm CMOS process, the total die area is 11 mm2. The maximum power consumption is 17.6mA with a 3.3V supply voltage, resulting in a 17× improvement in energy-efficiency over current conventional FPAAs.