CUFFS: An instruction count based architectural framework for security of MPSoCs

K Patel,S Parameswaran,R.G Ragel

doi:10.1109/date.2009.5090769

CUFFS: An instruction count based architectural framework for security of MPSoCs

K Patel, S Parameswaran + Show 1 more

https://doi.org/10.1109/date.2009.5090769

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Publication Date: Apr 1, 2009

Affiliation: UNSW Sydney, University of Peradeniya

#Multiprocessor System On Chip #Application Specific Instruction Set Processor + Show 8 more

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Abstract

Multiprocessor system on chip (MPSoC) architecture is rapidly gaining momentum for modern embedded devices. The vulnerabilities in software on MPSoCs are often exploited to cause software attacks, which are the most common type of attacks on embedded systems. Therefore, we propose an MPSoC architectural framework, CUFFS, for an application specific instruction set processor (ASIP) design that has a dedicated security processor called iGuard for detecting software attacks.

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