Cryogenic Support Circuits and Systems for Silicon Quantum Computers

Abstract

Scaled-up silicon quantum computers show great potential for being manufacturable in processes similar to modern ultra-deep sub-micron integrated circuit CMOS manufacturing processes. The operation of quantum computing cores require extensive support functions in terms of biasing, controlling and quantum state readout; functions that are implemented using classical electronic circuits. Since silicon quantum computer cores need to operate at deep cryogenic temperatures, therefore, the electronic support functions for scale-up quantum cores need – at least to some extent – to also operate at deep cryogenic temperatures. In this paper we discuss challenges associated with designing CMOS integrated support electronics for silicon quantum computer cores operating at cryogenic temperatures below carrier freeze-out. We look at device issues such as cold transistor characteristics and mismatch, circuit design techniques, and systems challenges such as nano-scale to micro-scale fan-out.