Abstract

This paper demonstrates the use of numerical simulation data, depending on the behavior of a low voltage dropout regulator, for reliability performance estimation based on the accelerated degradation test data. The regulator was designed using Cadence Virtuoso software in 180 nm AMS CMOS technology, and simulated to evaluate its output voltage variations to both temperature and input voltage. The output voltage degradation data were generated according to environmental parameters (input voltage and temperature) constraints, which makes it possible to define failure thresholds under accelerated conditions, making use of the numerical simulation model along with the proposed degradation model. Degradation path model has been adopted to determine the pseudo failure time under the specified failure criterion (5 %). Acceleration law model has then been derived to estimate the reliability model parameters by performing maximum likelihood estimation method not only to analyse but also to predict lifetime data distribution of the regulator under different voltage and temperature stress conditions.

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