Coupling-Inductor-Based Hybrid mm-Wave CMOS SPST Switch

Abstract

This brief presents a hybrid CMOS millimeter-wave single-pole single-throw (SPST) switch. This newly invented hybrid structure demonstrates better tradeoffs between insertion loss and isolation compared to conventional distributed structures. The performance benefits are analyzed in detail and validated by both simulation and measurement results. Additionally, the chip area is conserved by using lump elements, the coupled inductor. Moreover, a specific bias scheme is used to further decrease insertion loss by about 0.5 dB. This SPST switch achieves higher than 35-dB isolation over an ultrawide frequency range, from 54 to 84 GHz, a minimum 1.7-dB insertion loss, and <−10-dB reflection coefficient with 0.012-mm2 chip area in 65-nm CMOS. The design achieves more than 10-dB enhancement of isolation in comparison with the state-of-the-arts while maintaining similar insertion loss.