Abstract

The formation and propagation of void in flip-chip solder joints would reduce the reliability of solder interconnects obviously. Notably, continuously scaling down of the feature size of solder joints may greatly promote the formation and propagation of void in solder joints under electric current stressing. In addition, the elastic stress field induced by the externally applied stress has a big influence on the void evolution, leading to a decrease of reliability of solder joints inevitably. In this study, a coupled phase field and finite element method is used to simulate and investigate the void formation and propagation in a flip-chip Sn/Cu solder joint under electric current stressing and tensile stress, with considering the atom diffusion driven by chemical potential gradient and electrical field induced by electric current stressing. The simulation results of evolution and propagation of the void are consistent with experimental studies. Under electric current stressing, the void forms at the entrance corner of the electron flow, and propagates to the anode side along the interface between the Sn solder matrix (ball) and copper pad. Moreover, simulation results show that the externally applied tensile stress can promote the void propagation and the acceleration of the increasing rate of the voltage in the solder joint under coupled loads of electric current stressing and tensile stress.

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