Abstract
Discrete-time queueing models are naturally recognised as powerful and realistic tools for the performance evaluation of Asynchronous Transfer Mode (ATM) switch architectures, However, analytic solutions of such models are often hindered by the generation of large state spaces requiring further approximations and a considerable (or even prohibitive) amount of computation. This paper reviews two cost-effective methodologies for the exact and approximate analysis of discrete-time queueing models of multi-buffered and shared buffer ATM switch architectures with bursty and/or correlated traffic. The methodologies are based on the principle of entropy maximisation, queueing theoretic concepts and batch renewal processes. Comments on future research work are included.
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