Abstract
White light interferometry (WLI) has been used in the semiconductor industry for the measurement of topography, step height, and via depth, utilizing its fundamentally short coherence length. This allows the tool to achieve nanometer level resolution, making this technique ideal for through silicon via (TSV) measurements for high aspect ratio vias. In this paper, we will discuss one of the important measurement steps within 20 nm/14 nm technology node TSV processing, and how WLI is applied to make the measurements. For the post-chemical mechanical polish (CMP) dishing measurement near TSV's, we have evaluated a wafer map for processing that includes the wafer center and edge area. The CMP dishing measurement can be broken into two distinct regions of measurement: 1) Within-Field dishing and 2) Within-TSV dishing. Greater than 90% correlation with an AFM measurement for all dishing measurement regions has been observed. Less than 0.5% deviation for repeatability data pertaining to this measurement has also been observed.
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