Abstract

In the framework of the development of back-side illuminated CMOS image sensors, high-resolution synchrotron tomography has demonstrated a proportionality between electromigration-induced void volumes and time-to-failure in hybrid bonding-based test structures. A new sample preparation workflow has allowed to employ synchrotron-based tomography for statistical studies and to make it a tool for routine measurements. A conventional failure by voiding in long feed lines of the BEoL was observed. Process-induced bonding voids do not affect the reliability of the analyzed samples. Due to nonuniform distribution of the electric current in the region attached to the via matrix, the failure time is sensitive to the exact location and shape of the electromigration-induced void. This observation is important for understanding the role of via redundancy, which is provided by using via matrices, in increasing electromigration robustness of interconnects.

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