Abstract
We identify correlation between the drain currents in pristine n-channel FinFET transistors and changes in time-0 currents induced by hot-carrier stress. To achieve this goal, we employ our statistical simulation model for hot-carrier degradation (HCD), which considers the effect of random dopants (RDs) on HCD. For this analysis we generate a set of 200 device instantiations where each of them has its own unique configuration of RDs. For all “samples” in this ensemble we calculate time-0 currents (i.e., currents in undamaged FinFETs) and then degradation characteristics such as changes in the linear drain current and device lifetimes. The robust correlation analysis allows us to identify correlation between transistor lifetimes and drain currents in unstressed devices, which implies that FinFETs with initially higher currents degrade faster, i.e., have more prominent linear drain current changes and shorter lifetimes. Another important result is that although at stress conditions the distribution of drain currents becomes wider with stress time, in the operating regime drain current variability diminishes. Finally, we show that if random traps are also taken into account, all the obtained trends remain the same.
Highlights
One of the main problems plaguing performance of modern ultra-scaled field-effect transistors (FETs) is variability, which has multiple sources: random dopants (RDs) [1], perturbation in material properties [2,3], oxide thickness fluctuations [4,5], etc
For carrier transport modeling we use the deterministic solver of the Boltzmann transport equation (BTE) ViennaSHE [38,39,40,41], which is based on the spherical harmonics expansion of the carrier energy distribution function (DF)
Using our statistical model for hot-carrier degradation, we generated an ensemble of 200 instantiations of the n-channel FinFET with unique random dopants configurations, calculated time-0 drain currents, their normalized changes with stress time, and extracted device lifetimes
Summary
One of the main problems plaguing performance of modern ultra-scaled field-effect transistors (FETs) is variability, which has multiple sources: random dopants (RDs) [1], perturbation in material properties [2,3], oxide thickness fluctuations [4,5], etc. We perform the first theoretical study of the correlation between time-0 values of the linear and saturation drain currents (Id(0,l)in and Id(0,s)at, respectively) in n-channel FinFETs and relative drain current changes (∆Id,lin and ∆Id,sat) induced by HC stress. For this we employ our approach to stochastic HCD modeling [23,25,26]. We consider the roles of impacts of random dopants and random traps on this correlation
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