COREL: a dynamic compaction procedure for synchronous sequential circuits with repetition and local static compaction

Abstract

We propose a dynamic compaction procedure for non-scan synchronous sequential circuits. The procedure combines four compaction techniques. (1) Dynamic ordering of test subsequences generated for yet-undetected faults. (2) Local static compaction is performed every time a new subsequence is added to the test sequence. (3) Short test subsequences are discarded to prevent them from increasing the test length unnecessarily. (4) The test generation process is repeated with a fault order dynamically determined based on the existing test sequence. With these techniques, dynamic compaction yields test lengths that are shorter than all but the most aggressive and computationally expensive static compaction procedure.