Improving the efficiency of static compaction based on chronological order enumeration of test sequences [logic testing

Abstract

Chronological order enumeration is a static compaction procedure for synchronous sequential circuits that to-date produces the shortest test sequences overall for benchmark circuits. The chronological order enumeration procedure was not meant to compete in computational complexity with the highly-efficient restoration based compaction procedure. Rather, it was developed so as to provide a more aggressive target for static and dynamic test compaction procedures. Nevertheless, we describe in this work several algorithmic methods to improve the efficiency of compaction based on chronological order enumeration. These improvements reduce the run time of chronological order enumeration significantly using the same basic implementation. With these improvements, chronological order enumeration is shown to be faster and more effective than restoration based compaction for sequences produced by an ATPG that already uses restoration based compaction as part of the test generation process. For uncompacted sequences, restoration based compaction followed by the improved chronological order enumeration process is shown to be an effective combination.