Copper BEOL Interconnects for Silicon CMOS Logic Technology

Abstract

The semiconductor industry has been at the forefront of the technological revolution that has changed the way we live over the last three decades. The increase in performance of the integrated circuit (IC) chip has largely been due to the decreasing dimensions on the IC chip, leading to an increase in speed of the transistor. The transistors in an IC chip need to be connected to the outside world and the first level of hierarchy in this connection is the so called “back end of the line (BEOL) interconnect”. A typical BEOL interconnect consists of a metallic wire that is surrounded by an insulating cladding called the interlayer dielectric. Over the last few technology generations, it has become increasingly evident that shrinking device dimensions alone will not continue to achieve the increases in IC chip performance that the semiconductor industry needs. This is because the delay associated with sending signals through the BEOL interconnect begins to dominate the overall delay in the IC chip as seen in (Figure 2.1) [1]. The first step towards reducing this delay is to find a suitable metal that has a lower resistivity than aluminum (Al) to replace it as the wiring metal. Of all the elements in the periodic table, the most suitable candidate to replace Al as the wiring metal is copper (Cu). However, replacing Al with Cu as the metal of choice in BEOL interconnects is far from trivial.