Abstract
The effect of oxidation and annealing on the electrical properties of grain boundaries (GBs) in heavily doped polycrystalline silicon is characterized using bulk films and 30-nm-wide nanowires. Oxidation at 650–750 °C selectively oxidizes the GBs. Subsequent annealing at 1000 °C increases the associated potential barrier height and resistance. These observations can be explained by structural changes in the Si–O network at the GBs and the competition between surface oxygen diffusion and oxidation from the GBs in the crystalline grains. A combination of oxidation and annealing may provide a method that can better control the GB potential barriers.
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