Abstract

Multilevel converters continue their upward trend in renewable generation, electric vehicles, and power quality conditioning applications. Despite having satisfactory voltage capabilities, mainstream multilevel converters suffer from poor current sharing performances, thereby leading to the development of lattice converters, i.e., a strong and versatile type of future multilevel power converters. This article addresses two problems faced by lattice converters. First, we propose and detail how to optimize the efficiency of a given lattice converter by controlling the on/off states of H-bridge submodules. Second, we introduce the method that determines the voltage at each node of the converter in order to satisfy output voltage and current requirements. Design and analysis of lattice converters need a different mathematical toolbox than routinely exercised in power electronics. By use of graph theory, this article provides control methods of 3 × 3 and 4 × 4 lattice converters, satisfying various control objectives such as input/output terminals and output voltages. We further validate the methods with simulation results. The methodologies, algorithms, and special cases described in the article will aid further design and refinement of more efficient and easy-to-control lattice converters.

Highlights

  • Cascaded-bridge converters (CBCs) and modular multilevel converters (MMCs) are being applied in an increasing number of fields due to their advantages such as modularity and scalability [1,2,3]

  • High voltage power transmission [3,4,5,6], renewable energy generation [7,8,9,10,11], electric vehicles [12,13,14,15,16,17,18], power quality conditioning [19,20,21], transformers [22,23,24], and power supplies [25,26,27] are some of the fields where multilevel converters start to gain growing popularity

  • In spite of the forenamed advantages, classic modular multi level converters are limited in many aspects. They have weak current sharing capabilities [1,34], reduced efficiency at lower voltages, and stricter voltage balancing requirements [34,35]. These shortcomings motivate the introduction of parallel connectivity to MMCs [34,35,36,37,38,39,40]

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Summary

Introduction

Cascaded-bridge converters (CBCs) and modular multilevel converters (MMCs) are being applied in an increasing number of fields due to their advantages such as modularity and scalability [1,2,3]. A lattice graph can be viewed as a combination of paths, making it simple to optimize efficiencies and solve for node voltages. We write and solve the Kirchhoff current and voltage laws (KCL and KVL) Both laws can be represented using matrices corresponding to the lattice converter graph, making it simple to write down a system of linear equations and solve for the current on each edge. The vector element representing the destination node should be + Iout While this system of linear equations gives nine equations for the nine unknown edge currents, one of the equations is trivial (node 2 is not connected to any other nodes), necessitating the incorporation of KVL equations. (1) Given a lattice size, the adjacency matrix for a graph with all edges connected (none in the off state) is found with function MatrixGen(size) to be A;. In the case of possible damages to H-Bridge modules, preventing the optimized choice, it is easy to select another control option with highest efficiency given the constraint

Node Voltage Solutions
Results
Internal and Load Resistances

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