Continuous-Time Delta-Sigma Modulators With Time-Interleaved FIR Feedback

Abstract

The use of a single-bit quantizer in a wideband CTΔΣM is attractive, as the quantizer can be implemented in a power and area-efficient manner. Unfortunately, 1-bit CTΔΣMs are plagued by a host of difficulties. Clock jitter and quantizer metastability are particularly problematic, and the higher loop filter linearity needed to process the full-scale feedback waveform results in increased power dissipation. The use of a finite impulse response (FIR) feedback DAC is a power efficient way of addressing the challenges above. However, even this technique runs into difficulties at multi-GHz clock rates. This paper introduces the idea of time-interleaved (TI) FIR feedback to enhance the performance of a conventional FIR DAC. A single-bit CTΔΣM that uses a 2× TI-FIR DAC achieves 67.6/68.8/76 dB SNDR/SNR/DR in a 60 MHz bandwidth. Designed in a low leakage 65 nm CMOS process, the modulator operates at 6 GHz and occupies only 0.07 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . Its Walden Figure of Merit is 56.5 fJ/lvl.