Contention Mitigation based Level Shifter Architecture

Abstract

Energy efficiency is one of the most important issues that needs to be solved in the current system on chip design. To overcome this issue, many circuits inside the chip run at low power. However there are some blocks like memories that run at relatively higher voltages. This means, modern day SOC contains different voltages running through it. The problem arises when two blocks operating at different voltages want to communicate with each other. This problem is solved by using Level Shifters as an interfacer between the blocks. The function of Level Shifter is to convert voltage level of input signal to that of the output. In this paper a cross coupled architecture of Level Shifter is proposed which operates between 1.5v and 5v. The speciality of this architecture is there is less contention between pull up network and pull down network, which reduces the rise and fall delay significantly. The proposed design is simulated at different operating conditions and the functionality is checked.