Abstract
Physical design is a crucial stage determining the ultimate performance of very-large-scale integration design in which the constraint application plays an important role. Unfortunately, the resulting influence and propagation of the constraint is unknown so far and needs to be studied comprehensively. Here, the authors attempt to evaluate the propagation of the constraint in two different optimisation styles, i.e. embed-physical-extract (EPE) style and embed-optimise-physical-extract (EOPE) style. The simulation result shows the survivability of constraint in the EPE style retains intact, while it degraded for a large degree in the EOPE style with the best propagation probability of 49.53%. The result gives evidence of how constraint propagates in the physical design of a circuit.
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