Relative timing driven multi-synchronous design

Abstract

Energy efficient integrated circuit design largely stems from two very different disciplines: high level system architecture, and low level physical design. These two disciplines are tied together by the algorithms, methodologies, and related CAD which generate productivity and achieve consistency between these domains. Thus a goblet aptly depicts energy efficient design. The architecture, which delivers the payload, is represented by the cup. Physical design is the goblet base, and the CAD and algorithms are represented by the goblet's stem. All three are essential components. Energy efficient designs often result from multi-synchronous architectures because the most efficient energy-delay point normally differs for each component in a system. The most energy-efficient circuits and physical design are based on asynchronous methodologies. Thus power optimized multi-synchronous architectures can result in an order of magnitude reduction in power at the same performance over traditional design approaches, if new algorithms and physical design are employed. The differentiating factor between traditional design and energy efficient systems is timing, since each component may operate at an independent frequency. A new method of representing timing for multi-synchronous systems is presented that is based on a relativistic and logical model rather than numeric based timing models. Employing relativistic timing constraints provides a significant improvement in energy efficiency, but also fundamentally changes the approach to timing driven physical design optimization. How the relative timing model results in a ten-fold improvement in power at the same performance will be demonstrated by example, as well has the challenges and opportunities it poses stem and base of the wine goblet: the algorithms, CAD, and physical design.