Constrained Coding and Deep Learning Aided Threshold Detection for Resistive Memories

Abstract

Resistive random access memory (ReRAM) is a promising emerging non-volatile memory (NVM) technology that shows high potential for both data storage and computing. However, its crossbar array architecture leads to the sneak path (SP) problem, which may severely degrade the data storage reliability of ReRAM. Due to the complicated nature of the SP-induced interference (SPI) <xref ref-type="bibr" rid="ref1" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">[1]</xref> , it is difficult to derive an accurate channel model for it. The deep learning (DL)-based detection scheme (Zhong <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">et al.</i> , 2020) can better mitigate the SPI, at the cost of additional power consumption and read latency. In this letter, we first propose a novel constrained coding (CC) scheme which can not only reduce the SPI, but also effectively differentiate the memory arrays into two categories of SPI-free and SPI-affected arrays. For the SPI-free arrays, we can use a simple middle-point threshold detector to detect the low and high resistance cells of ReRAM. For the SPI-affected arrays, a DL detector is first trained off-line. To avoid the additional power consumption and latency introduced by the DL detector, we further propose a DL-based threshold detector, whose detection threshold can be derived based on the outputs of the DL detector. It is then utilized for the online data detection of all the identified SPI-affected arrays. Simulation results demonstrate that the above CC and DL aided threshold detection scheme can effectively mitigate the SPI of the ReRAM array and achieve better error rate performance than the prior art detection schemes, without the prior knowledge of the channel.