Abstract
The usage of static random access memory-based field programmable gate arrays (FPGAs) on high-energy physics detectors is mostly limited by the sensitivity of devices to radiation-induced upsets in their configuration. In this paper, we describe a scrubber core designed for Xilinx FPGAs, based on configuration redundancy. When no upsets happen in homologous redundant bits and the scrubber is functional, the adopted redundancy makes it possible to correct all the errors. In fact, the scrubber corrects its own configuration and the one pertaining to a given user design. We discuss the architecture and two implementations of the scrubber, corresponding to different flavors of triple modular redundancy. We report results from proton irradiation tests, which prove that our core can extend the lifetime of a benchmark circuit up to 290%.
Highlights
O FF-DETECTOR electronics in trigger and data acquisition systems of high-energy physics (HEP) experiments are often implemented by means of static random access memory (SRAM)-based field-programmable gate arrays (SRAM-based field programmable gate arrays (FPGAs)) [1], [2]
In SRAM-based FPGAs, all programmable features are controlled by SRAM memory cells that are collectively known as configuration memory
We carried out irradiation tests by means of a 62-MeV proton beam at the CATANA irradiation facility of the Laboratori Nazionali del Sud (LNS), Catania, Italy
Summary
O FF-DETECTOR electronics in trigger and data acquisition systems of high-energy physics (HEP) experiments are often implemented by means of static random access memory (SRAM)-based field-programmable gate arrays (SRAM-based FPGAs) [1], [2]. The patent described in [14] and the work presented in [15] are both based on configuration redundancy at the device level. The work described in [16] shows a clever implementation of a parity scheme to detect upsets in configuration frames It is based on the usage of “erasure codes” for rebuilding incorrect frames and block RAMs (BRAMS) for storing parity bits. A common aspect of the methods described in [17] and [19] is that they both require identical subsets of the FPGA device for hosting the redundant configuration (or modules). We present a scrubber core designed for Xilinx FPGAs based on a configuration redundancy scheme.
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