Conducted Coupling Model and Anti-Interference Filter Design for Digital Control Circuit Under Electrical Fast Transient Noise

Abstract

Control and protection equipment working in complex electromagnetic environment often suffers from electrical fast transient (EFT) noise, which easily leads to the failure of digital control circuits of the equipment. In order to realize low-cost and effective anti-interference solutions to the failure problem, it is necessary to study the anti-interference quantitative design method of the digital control circuit. In this article, a conducted interference coupling model of the digital control circuit under EFT noise is established. As an important part of the coupling path, the impedance model of the chip is built. A black-box impedance modeling method of voltage regulator chip is proposed based on online measurement. The equivalent impedance model of the digital signal processing (DSP) chip is represented by the high-frequency model of the inductor. The coupling model is validated by comparing the measured results and simulated results of the terminal load port voltage. Then, a measurement and analysis method is presented to obtain the circuit failure threshold. By analyzing EFT test results at different frequencies and amplitudes, the influencing factor of the circuit failure is clarified, and the circuit failure threshold is obtained. Finally, based on the coupling model and the circuit failure threshold, a quantitative design method of an anti-interference filter is developed. The method is validated through filter prototyping for a 5 kHz/+2.0 kV EFT test.