Computing optimal test sequences from complete test sets for stuck-open faults in CMOS circuits

S Chakravarty,S.S Ravi

doi:10.1109/43.46808

Computing optimal test sequences from complete test sets for stuck-open faults in CMOS circuits

S Chakravarty, S.S Ravi

https://doi.org/10.1109/43.46808

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Journal: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems	Publication Date: Mar 1, 1990
Citations: 18

Affiliation: University at Buffalo, State University of New York, New York University, University at Albany, State University of New York, Albany State University

#Faults In CMOS Circuit #Stuck-open Faults In CMOS Circuits + Show 8 more

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Abstract

A sequence of input vectors which detects all transistor stuck-open faults in a CMOS combinational circuit is a complete test sequence. Given a complete set of two-pattern tests for transistor stuck-open faults in a CMOS circuit, it is shown that a complete test sequence of minimum length can be obtained efficiently. A precise description of this problem and examples to illustrate the method are presented. >

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