Computing in-memory with cascaded spintronic devices for AI edge

Abstract

Spin-transfer-torque magnetic random access memory (STT-MRAM) shows great advantages for computing in-memory (CIM), which has emerged as a popular research direction to overcome the “memory wall” bottleneck in artificial intelligence (AI) applications. In this work, a magnetoresistance accumulation based computing in STT-MRAM (MA-CIM) framework using cascaded magnetic tunnel junctions is proposed for binary neural networks (BNN) inference. A SAR-like sensing scheme is elaborated to generate parallel multi-channel convolution results. Simulation analysis and layout design were performed using an industrial 28-nm CMOS process. MNIST and CIFAR-10 image recognition were executed with MA-CIM and the inference accuracy can reach 97.2% and 81.3%, respectively. Compared to current accumulation, the energy efficiency improves by 1.24× to 92.3 TOPS/W. The proposed MA-CIM framework improves the parallelism and energy efficiency of in-MRAM-computing, making it suitable for a wide range of AI applications requiring high energy efficiency at the edge, such as image recognition and speech recognition.