Abstract
Several promising non-volatile memories (NVMs) such as magnetic RAM (MRAM), spin-transfer torque RAM (STTRAM), ferroelectric RAM (FeRAM), resistive RAM (RRAM), and phase-change memory (PCM) are being investigated to keep the static leakage within a tolerable limit. These new technologies offer high density and consume zero leakage power and can bridge the gap between processor and memory. The desirable properties of emerging NVMs make them suitable candidates for several applications including replacement of conventional memories. However, their unique characteristics introduce new data privacy and security issues. Some of them are already available in the market as discrete chips or a part of full system implementation. They are considered to become ubiquitous in future computing devices. Therefore, it is important to ensure their security/privacy issues. Note that these NVMs can be considered for cache, main memory, or storage application. They are also suitable to implement in-memory computation which increases system throughput and eliminates von Neumann bottleneck. Compute-capable NVMs impose new security and privacy challenges that are fundamentally different than their storage counterpart. This work identifies NVM vulnerabilities and attack vectors originating from the device level all the way to circuits and systems, considering both storage and compute applications. We also summarize the circuit/system-level countermeasures to make the NVMs robust against security and privacy issues.
Highlights
The work [85] assumes that: (i) non-volatile memories (NVMs) level cache (LLC) is being shared by two users; (ii) bank-level parallel read/write operation is performed to increase the throughput; (iii) the adversary has the knowledge of the amount of droop/bounce that can be generated by a read/write data pattern; (iv) the adversary knows how the generated droop/bounce propagates and how it affects the victim’s write/read operation; (v) the adversary is an expert in computer architecture and can exploit knobs, e.g., accessing specific data patterns in pre-defined physical locations to prevent their replacement by policies, e.g., least recently used (LRU)
The results indicate that logging applied to a title loop increases the number of the write operations to NVM main memory
We present a discussion on the vulnerability of NVM-based in-memory computing (IMC) and on the premise of employing hardware Trojan leveraging NVM
Summary
Publisher’s Note: MDPI stays neutral with regard to jurisdictional claims in published maps and institutional affiliations. Some flavors of emerging NVMs are spin-transfer torque RAM (STTRAM) [32,33,34,35], magnetic RAM (MRAM) [36,37,38], phasechange memory (PCM) [39,40,41], resistive RAM (RRAM) [42,43,44], and ferroelectric RAM (FeRAM) [45,46]. Encryption [77,78] is used to address the privacy of the sensitive data of the HDD Volatile memory such as SRAM is considered safe due to the randomization of data at power down. Addressing data privacy in higher levels of memory stack while maintaining performance is a challenge. Writestrength errors with magnetic strength obtained from commercial MRAM chip
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