Comprehensive study of gate induced drain leakage in nanowire and nanotube junctionless FETs using Si1-xGex source/drain

Abstract

We present, in this paper, optimized nanotube (NT) and nanowire (NW) junctionless field-effect transistor (JLFET) architectures of gate-induced drain leakage (GIDL). At the source/ drain–channel interface, SiGe creates a valence energy band discontinuity which alleviates lateral band-to-band tunneling (L-BTBT) of electrons in the OFF-state. It is established through 2-D TCAD simulations that inclusion of SiGe decreases L-BTBT in the NTJLFET by >5 orders, thus leading to a substantial ION/IOFF of with precision 1012 for a 20 nm gate length which is not attainable in the conventional NTJLFET (ION/IOFF ∼ 106). Furthermore, degraded OFF-state current in NWJLFET because of conventional charge-sharing effect improves with the inclusion of SiGe by ∼2 orders of magnitude. Additionally, it is effective to place SiGe layers positioned at the source and drain regions and SiGe/ Si interface inside or at the channel region. Based on the proposed design guidelines, we show that the optimized SiGe S/D NTJLFET is effective in reduction of L-BTBT GIDL when gate length is scaled to 5 nm.