Abstract
Comprehensive channel material benchmarking for n- and pMOS are performed considering effects of quantum transport and carrier scattering. Various channel material options (Si, InAs, In0.7Ga0.3As, In0.53Ga0.47As, GaAs, and Ge for nMOS, Si and Ge for pMOS) are covered using hybrid simulation of quantum ballistic transport and semi-classical Monte Carlo. Current-voltage characteristics and performance metrics such as the capacitance and effective drive current ( $I_{eff}$ ) are explored considering device parasitic components. For low power operation, III-V nMOS may deliver good performance while Ge n- and pMOS with different source/drain tip designs may give performance advantage over Si from low power to high performance operations. CMOS benchmarking results for $I_{eff}$ , capacitance, and switching energy vs. delay (for gate capacitance loading vs. interconnect wire capacitance loading) are also presented for various homogeneous and hybrid combinations of n- and pMOS (Si CMOS, III-V hybrid CMOS, Ge hybrid CMOS, and Ge CMOS). Finally, sensitivity analysis is performed for $I_{eff}$ on the parasitic resistance ( $R_{SD}$ ) and contact resistivity ( ${\boldsymbol{\rho }} _{c}$ ). Novel channel materials may relax the $R_{SD}$ and ${\boldsymbol{\rho }} _{c}$ requirements to match the $I_{eff}$ performance of Si reference. Comprehensive literature reviews of experimental ${\boldsymbol{\rho }} _{c}$ ’s of novel materials are also presented to discuss the effect of material-dependent $R_{SD}$ .
Highlights
To continue the scaling of metal-oxide-semiconductor fieldeffect transistor (MOSFET) and satisfy performance metric requirements [1], novel channel materials such as III-V’s and Ge are being actively explored [2]–[4]
We report energy vs. delay for various cases of homogeneous complementary MOS (CMOS) and hybrid CMOS for different capacitance loading scenarios
On the 2D color plot, ballistic ratio (BR) values are shown at 4 relevant bias conditions
Summary
To continue the scaling of metal-oxide-semiconductor fieldeffect transistor (MOSFET) and satisfy performance metric requirements [1], novel channel materials such as III-V’s and Ge are being actively explored [2]–[4]. For nanoscale MOSFETs, it is critical to treat all relevant physical effects (beyond the simple mobility-based model) such as quantum capacitance [6], tunneling [7], and ballistic transport [8] to correctly project the performance. For alternative materials such as III-V’s and Ge, it is especially important to take a rigorous and comprehensive approach because the lighter electron or hole effective mass (m∗) makes those materials more susceptible to such novel physical effects (e.g., smaller quantum capacitance, larger tunneling current, and more ballistic carriers) [9]–[11]. The semi-classical model including scattering effects (such as Monte Carlo (MC) simulation [27]–[29]) has been
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