Abstract
The Phase Frequency Detector (PFD) is a pivotal foundational element within phase-locked loops (PLLs). This literature review systematically explores various linear PFD architectures, conducting a comprehensive analysis of their performance parameters and elucidating the impact of these architectures on Phase Locked Loop (PLL) characteristics. The survey encompasses diverse PFD designs, including linear PFDs with 1800 and 3600 detection ranges. This study focuses on the various types of research that employed cutting-edge techniques in order to alleviate prevalent PFD challenges viz dead zone, blind zone, reset delay, detection range, maximum operating frequency, power consumption, and area. The survey provides invaluable resources for novice investigators and seasoned experts in PLL, fostering a holistic comprehension of the current PFD landscape which further facilitates innovation in wireless communication engineering. Additionally, the review meticulously outlines the differences that can be implemented in PFD for better outcomes of the PLL.
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