Abstract

This chapter establishes the electrostatic discharge (ESD) control methods and ESD target levels for IC components and outlines the details of the system level ESD threats and the corresponding test methods. It discusses why correlation with component-level ESD ratings cannot be expected to work. The chapter briefly reviews the test methods used to analyze an IC chip for its robustness against ESD transients in the field and discusses specific control programs for advanced devices. An overview of the differences between the system level and HBM test methods is also provided. Automobile applications commonly refer to system level ESD stress testing according to ISO 10605. The purpose of IEC 6100-4-2 and related standards is to prove the system level ESD robustness of the finished system which will be handled by the end-customer.

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