Complementary Digital Logic Using Resistively Coupled Single-Electron Transistor

Abstract

A new complementary digital logic based on resistively coupled single-electron transistors (R-SET) was proposed and its basic characteristics were numerically analyzed using the Monte Carlo method. The proposed logic has a logic threshold independent of background polarization charges which induce crucial problems in logic operation in the case of a capacitively coupled logic. In addition, the proposed complementary R-SET logic has larger output voltage swing and better logic level stability than those of a conventional resistance-load R-SET logic. The stability of the logic level of the complementary R-SET logic was investigated by calculating the data retention time of flip-flop circuits, and its dependence on temperature and shot noise was examined. For stable operation of the flip-flop circuit, estimated optimal operation temperature and switching delay time are e2/80C tk B and 1500 R tC t, respectively, where C t and R t are capacitance and resistance of the tunnel junction.