Competing Degradation Mechanisms in Short-Channel Transistors Under Channel Hot-Carrier Stress at Elevated Temperatures

E Amat,X Aymerich,R Degraeve,R Rodriguez,G Groeseneken,M Nafria,T Kauerauf

doi:10.1109/tdmr.2009.2025178

Abstract

The temperature dependence of channel hot-carrier (CHC) degradation in n-MOS transistors with high- k dielectrics has been studied. The analysis starts from the most damaging CHC stress conditions at room temperature ( V G = V D /2 for long channels and V G = V D for short channels). We find that, for long-channel transistors, the CHC degradation decreases at high temperature, while for short-channel transistors, an increase is observed. In this paper, a new picture to explain the observed increment of CHC damage with temperature for short-channel transistors with high- k dielectric is presented. We demonstrate that the total CHC degradation consists of two components: the classical CHC damage located at the drain side and the degradation produced by the voltage drop over the gate dielectric, which can be considered a positive bias temperature instability (PBTI) effect. Particularly for short transistors stressed at high temperatures, this PBTI component dominates the total CHC degradation.

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