Comparison of serial data-input CRC and parallel data-input CRC design for CRC-8 ATM HEC employing MLFSR

Avipsa S Panda,G L Kumar

doi:10.1109/ecs.2014.6892739

Comparison of serial data-input CRC and parallel data-input CRC design for CRC-8 ATM HEC employing MLFSR

Avipsa S Panda, G L Kumar

https://doi.org/10.1109/ecs.2014.6892739

Copy DOI

Publication Date: Feb 1, 2014

Citations: 4

Affiliation: KIIT University

#Cyclic Redundancy Check #Cyclic Redundancy Check Computation + Show 8 more

Abstract
Full-Text PDF
Similar Papers

Abstract

Cyclic Redundancy check (CRC) is primarily used in the physical layer of transmission protocols (viz., Ethernet and Bluetooth). CRC computation can be done in two ways; either serial computation or parallel computation. CRC computation implement linear feedback shift registers (LFSRs). The proposed paper gives an insight of serial and parallel implementation of CRC 8- CCITT widely used in Header Error Control in Asynchronous Transfer Mode (ATM HEC).

Full Text