Comparison of decoupling resistors and capacitors for increasing the single event upset resistance of SRAM cells

Abstract

The effects of various values and combinations of decoupling resistors and capacitors on the single event upset (SEU) resistance of static random access memory (SRAM) cells with six transistors have been studied by Spice simulations based on a partially-depleted (PD) silicon-on-insulator (SOI) CMOS technology. It is found that there is an effect enhancement for the combination of the decoupling resistors and capacitors in increasing the SEU linear energy transfer (LET) threshold of the cell, compared with the sum of the SEU LET threshold increments resulting from the corresponding resistors and capacitors, respectively. Also, with the product of the resistance r and capacitance c being constant, a larger r produces a higher SEU LET threshold. In addition, the simulation results show that the LET threshold increases nonlinearly with r, while it does linearly with c.