Comparative Study on the Forbidden States of the SR Flip-flops

Abstract

In the teaching process of “Digital Electronic Technology” or “Digital Circuit” in colleges and universities, it is usually necessary to teach the forbidden states of the two “basic SR latches”, the “synchronous SR flip-flops”, the “master-slave SR flip-flop” and the “standard SR flip-flop” that do not satisfy the constraint condition. However, it is found in the examination of various teaching materials, many teachers have a vague understanding of the corresponding forbidden state, thus giving the wrong way of speaking. This paper gives a comparative analysis of various forbidden states, trying to clarify the ambiguity about them. Further, four new names of “both 0 state (or third state)” and “both 1 state (or fourth state)” are suggested, and suggestions for the correct truth table of the corresponding forbidden state in various situations are given. This paper is expected to play a positive role in the teaching of the electronic technology basic courses and in the preparation, re-preparation and publication of teaching materials.